1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | /* thread_info.h: low-level thread information |
3 | * |
4 | * Copyright (C) 2002 David Howells (dhowells@redhat.com) |
5 | * - Incorporating suggestions made by Linus Torvalds and Dave Miller |
6 | */ |
7 | |
8 | #ifndef _ASM_X86_THREAD_INFO_H |
9 | #define _ASM_X86_THREAD_INFO_H |
10 | |
11 | #include <linux/compiler.h> |
12 | #include <asm/page.h> |
13 | #include <asm/percpu.h> |
14 | #include <asm/types.h> |
15 | |
16 | /* |
17 | * TOP_OF_KERNEL_STACK_PADDING is a number of unused bytes that we |
18 | * reserve at the top of the kernel stack. We do it because of a nasty |
19 | * 32-bit corner case. On x86_32, the hardware stack frame is |
20 | * variable-length. Except for vm86 mode, struct pt_regs assumes a |
21 | * maximum-length frame. If we enter from CPL 0, the top 8 bytes of |
22 | * pt_regs don't actually exist. Ordinarily this doesn't matter, but it |
23 | * does in at least one case: |
24 | * |
25 | * If we take an NMI early enough in SYSENTER, then we can end up with |
26 | * pt_regs that extends above sp0. On the way out, in the espfix code, |
27 | * we can read the saved SS value, but that value will be above sp0. |
28 | * Without this offset, that can result in a page fault. (We are |
29 | * careful that, in this case, the value we read doesn't matter.) |
30 | * |
31 | * In vm86 mode, the hardware frame is much longer still, so add 16 |
32 | * bytes to make room for the real-mode segments. |
33 | * |
34 | * x86-64 has a fixed-length stack frame, but it depends on whether |
35 | * or not FRED is enabled. Future versions of FRED might make this |
36 | * dynamic, but for now it is always 2 words longer. |
37 | */ |
38 | #ifdef CONFIG_X86_32 |
39 | # ifdef CONFIG_VM86 |
40 | # define TOP_OF_KERNEL_STACK_PADDING 16 |
41 | # else |
42 | # define TOP_OF_KERNEL_STACK_PADDING 8 |
43 | # endif |
44 | #else /* x86-64 */ |
45 | # ifdef CONFIG_X86_FRED |
46 | # define TOP_OF_KERNEL_STACK_PADDING (2 * 8) |
47 | # else |
48 | # define TOP_OF_KERNEL_STACK_PADDING 0 |
49 | # endif |
50 | #endif |
51 | |
52 | /* |
53 | * low level task data that entry.S needs immediate access to |
54 | * - this struct should fit entirely inside of one cache line |
55 | * - this struct shares the supervisor stack pages |
56 | */ |
57 | #ifndef __ASSEMBLY__ |
58 | struct task_struct; |
59 | #include <asm/cpufeature.h> |
60 | #include <linux/atomic.h> |
61 | |
62 | struct thread_info { |
63 | unsigned long flags; /* low level flags */ |
64 | unsigned long syscall_work; /* SYSCALL_WORK_ flags */ |
65 | u32 status; /* thread synchronous flags */ |
66 | #ifdef CONFIG_SMP |
67 | u32 cpu; /* current CPU */ |
68 | #endif |
69 | }; |
70 | |
71 | #define INIT_THREAD_INFO(tsk) \ |
72 | { \ |
73 | .flags = 0, \ |
74 | } |
75 | |
76 | #else /* !__ASSEMBLY__ */ |
77 | |
78 | #include <asm/asm-offsets.h> |
79 | |
80 | #endif |
81 | |
82 | /* |
83 | * thread information flags |
84 | * - these are process state flags that various assembly files |
85 | * may need to access |
86 | */ |
87 | #define TIF_NOTIFY_RESUME 1 /* callback before returning to user */ |
88 | #define TIF_SIGPENDING 2 /* signal pending */ |
89 | #define TIF_NEED_RESCHED 3 /* rescheduling necessary */ |
90 | #define TIF_SINGLESTEP 4 /* reenable singlestep on user return*/ |
91 | #define TIF_SSBD 5 /* Speculative store bypass disable */ |
92 | #define TIF_SPEC_IB 9 /* Indirect branch speculation mitigation */ |
93 | #define TIF_SPEC_L1D_FLUSH 10 /* Flush L1D on mm switches (processes) */ |
94 | #define TIF_USER_RETURN_NOTIFY 11 /* notify kernel of userspace return */ |
95 | #define TIF_UPROBE 12 /* breakpointed or singlestepping */ |
96 | #define TIF_PATCH_PENDING 13 /* pending live patching update */ |
97 | #define TIF_NEED_FPU_LOAD 14 /* load FPU on return to userspace */ |
98 | #define TIF_NOCPUID 15 /* CPUID is not accessible in userland */ |
99 | #define TIF_NOTSC 16 /* TSC is not accessible in userland */ |
100 | #define TIF_NOTIFY_SIGNAL 17 /* signal notifications exist */ |
101 | #define TIF_MEMDIE 20 /* is terminating due to OOM killer */ |
102 | #define TIF_POLLING_NRFLAG 21 /* idle is polling for TIF_NEED_RESCHED */ |
103 | #define TIF_IO_BITMAP 22 /* uses I/O bitmap */ |
104 | #define TIF_SPEC_FORCE_UPDATE 23 /* Force speculation MSR update in context switch */ |
105 | #define TIF_FORCED_TF 24 /* true if TF in eflags artificially */ |
106 | #define TIF_BLOCKSTEP 25 /* set when we want DEBUGCTLMSR_BTF */ |
107 | #define TIF_LAZY_MMU_UPDATES 27 /* task is updating the mmu lazily */ |
108 | #define TIF_ADDR32 29 /* 32-bit address space on 64 bits */ |
109 | |
110 | #define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME) |
111 | #define _TIF_SIGPENDING (1 << TIF_SIGPENDING) |
112 | #define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) |
113 | #define _TIF_SINGLESTEP (1 << TIF_SINGLESTEP) |
114 | #define _TIF_SSBD (1 << TIF_SSBD) |
115 | #define _TIF_SPEC_IB (1 << TIF_SPEC_IB) |
116 | #define _TIF_SPEC_L1D_FLUSH (1 << TIF_SPEC_L1D_FLUSH) |
117 | #define _TIF_USER_RETURN_NOTIFY (1 << TIF_USER_RETURN_NOTIFY) |
118 | #define _TIF_UPROBE (1 << TIF_UPROBE) |
119 | #define _TIF_PATCH_PENDING (1 << TIF_PATCH_PENDING) |
120 | #define _TIF_NEED_FPU_LOAD (1 << TIF_NEED_FPU_LOAD) |
121 | #define _TIF_NOCPUID (1 << TIF_NOCPUID) |
122 | #define _TIF_NOTSC (1 << TIF_NOTSC) |
123 | #define _TIF_NOTIFY_SIGNAL (1 << TIF_NOTIFY_SIGNAL) |
124 | #define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG) |
125 | #define _TIF_IO_BITMAP (1 << TIF_IO_BITMAP) |
126 | #define _TIF_SPEC_FORCE_UPDATE (1 << TIF_SPEC_FORCE_UPDATE) |
127 | #define _TIF_FORCED_TF (1 << TIF_FORCED_TF) |
128 | #define _TIF_BLOCKSTEP (1 << TIF_BLOCKSTEP) |
129 | #define _TIF_LAZY_MMU_UPDATES (1 << TIF_LAZY_MMU_UPDATES) |
130 | #define _TIF_ADDR32 (1 << TIF_ADDR32) |
131 | |
132 | /* flags to check in __switch_to() */ |
133 | #define _TIF_WORK_CTXSW_BASE \ |
134 | (_TIF_NOCPUID | _TIF_NOTSC | _TIF_BLOCKSTEP | \ |
135 | _TIF_SSBD | _TIF_SPEC_FORCE_UPDATE) |
136 | |
137 | /* |
138 | * Avoid calls to __switch_to_xtra() on UP as STIBP is not evaluated. |
139 | */ |
140 | #ifdef CONFIG_SMP |
141 | # define _TIF_WORK_CTXSW (_TIF_WORK_CTXSW_BASE | _TIF_SPEC_IB) |
142 | #else |
143 | # define _TIF_WORK_CTXSW (_TIF_WORK_CTXSW_BASE) |
144 | #endif |
145 | |
146 | #ifdef CONFIG_X86_IOPL_IOPERM |
147 | # define _TIF_WORK_CTXSW_PREV (_TIF_WORK_CTXSW| _TIF_USER_RETURN_NOTIFY | \ |
148 | _TIF_IO_BITMAP) |
149 | #else |
150 | # define _TIF_WORK_CTXSW_PREV (_TIF_WORK_CTXSW| _TIF_USER_RETURN_NOTIFY) |
151 | #endif |
152 | |
153 | #define _TIF_WORK_CTXSW_NEXT (_TIF_WORK_CTXSW) |
154 | |
155 | #define STACK_WARN (THREAD_SIZE/8) |
156 | |
157 | /* |
158 | * macros/functions for gaining access to the thread information structure |
159 | * |
160 | * preempt_count needs to be 1 initially, until the scheduler is functional. |
161 | */ |
162 | #ifndef __ASSEMBLY__ |
163 | |
164 | /* |
165 | * Walks up the stack frames to make sure that the specified object is |
166 | * entirely contained by a single stack frame. |
167 | * |
168 | * Returns: |
169 | * GOOD_FRAME if within a frame |
170 | * BAD_STACK if placed across a frame boundary (or outside stack) |
171 | * NOT_STACK unable to determine (no frame pointers, etc) |
172 | * |
173 | * This function reads pointers from the stack and dereferences them. The |
174 | * pointers may not have their KMSAN shadow set up properly, which may result |
175 | * in false positive reports. Disable instrumentation to avoid those. |
176 | */ |
177 | __no_kmsan_checks |
178 | static inline int arch_within_stack_frames(const void * const stack, |
179 | const void * const stackend, |
180 | const void *obj, unsigned long len) |
181 | { |
182 | #if defined(CONFIG_FRAME_POINTER) |
183 | const void *frame = NULL; |
184 | const void *oldframe; |
185 | |
186 | oldframe = __builtin_frame_address(1); |
187 | if (oldframe) |
188 | frame = __builtin_frame_address(2); |
189 | /* |
190 | * low ----------------------------------------------> high |
191 | * [saved bp][saved ip][args][local vars][saved bp][saved ip] |
192 | * ^----------------^ |
193 | * allow copies only within here |
194 | */ |
195 | while (stack <= frame && frame < stackend) { |
196 | /* |
197 | * If obj + len extends past the last frame, this |
198 | * check won't pass and the next frame will be 0, |
199 | * causing us to bail out and correctly report |
200 | * the copy as invalid. |
201 | */ |
202 | if (obj + len <= frame) |
203 | return obj >= oldframe + 2 * sizeof(void *) ? |
204 | GOOD_FRAME : BAD_STACK; |
205 | oldframe = frame; |
206 | frame = *(const void * const *)frame; |
207 | } |
208 | return BAD_STACK; |
209 | #else |
210 | return NOT_STACK; |
211 | #endif |
212 | } |
213 | |
214 | #endif /* !__ASSEMBLY__ */ |
215 | |
216 | /* |
217 | * Thread-synchronous status. |
218 | * |
219 | * This is different from the flags in that nobody else |
220 | * ever touches our thread-synchronous status, so we don't |
221 | * have to worry about atomic accesses. |
222 | */ |
223 | #define TS_COMPAT 0x0002 /* 32bit syscall active (64BIT)*/ |
224 | |
225 | #ifndef __ASSEMBLY__ |
226 | #ifdef CONFIG_COMPAT |
227 | #define TS_I386_REGS_POKED 0x0004 /* regs poked by 32-bit ptracer */ |
228 | |
229 | #define arch_set_restart_data(restart) \ |
230 | do { restart->arch_data = current_thread_info()->status; } while (0) |
231 | |
232 | #endif |
233 | |
234 | #ifdef CONFIG_X86_32 |
235 | #define in_ia32_syscall() true |
236 | #else |
237 | #define in_ia32_syscall() (IS_ENABLED(CONFIG_IA32_EMULATION) && \ |
238 | current_thread_info()->status & TS_COMPAT) |
239 | #endif |
240 | |
241 | extern void arch_setup_new_exec(void); |
242 | #define arch_setup_new_exec arch_setup_new_exec |
243 | #endif /* !__ASSEMBLY__ */ |
244 | |
245 | #endif /* _ASM_X86_THREAD_INFO_H */ |
246 | |