1//===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file defines the TargetMachine and LLVMTargetMachine classes.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_TARGET_TARGETMACHINE_H
14#define LLVM_TARGET_TARGETMACHINE_H
15
16#include "llvm/ADT/StringRef.h"
17#include "llvm/IR/DataLayout.h"
18#include "llvm/IR/PassManager.h"
19#include "llvm/Support/Allocator.h"
20#include "llvm/Support/CodeGen.h"
21#include "llvm/Support/Error.h"
22#include "llvm/Support/PGOOptions.h"
23#include "llvm/Target/CGPassBuilderOption.h"
24#include "llvm/Target/TargetOptions.h"
25#include "llvm/TargetParser/Triple.h"
26#include <optional>
27#include <string>
28#include <utility>
29
30namespace llvm {
31
32class AAManager;
33using ModulePassManager = PassManager<Module>;
34
35class Function;
36class GlobalValue;
37class MachineModuleInfoWrapperPass;
38class Mangler;
39class MCAsmInfo;
40class MCContext;
41class MCInstrInfo;
42class MCRegisterInfo;
43class MCStreamer;
44class MCSubtargetInfo;
45class MCSymbol;
46class raw_pwrite_stream;
47class PassBuilder;
48struct PerFunctionMIParsingState;
49class SMDiagnostic;
50class SMRange;
51class Target;
52class TargetIntrinsicInfo;
53class TargetIRAnalysis;
54class TargetTransformInfo;
55class TargetLoweringObjectFile;
56class TargetPassConfig;
57class TargetSubtargetInfo;
58
59// The old pass manager infrastructure is hidden in a legacy namespace now.
60namespace legacy {
61class PassManagerBase;
62}
63using legacy::PassManagerBase;
64
65struct MachineFunctionInfo;
66namespace yaml {
67struct MachineFunctionInfo;
68}
69
70//===----------------------------------------------------------------------===//
71///
72/// Primary interface to the complete machine description for the target
73/// machine. All target-specific information should be accessible through this
74/// interface.
75///
76class TargetMachine {
77protected: // Can only create subclasses.
78 TargetMachine(const Target &T, StringRef DataLayoutString,
79 const Triple &TargetTriple, StringRef CPU, StringRef FS,
80 const TargetOptions &Options);
81
82 /// The Target that this machine was created for.
83 const Target &TheTarget;
84
85 /// DataLayout for the target: keep ABI type size and alignment.
86 ///
87 /// The DataLayout is created based on the string representation provided
88 /// during construction. It is kept here only to avoid reparsing the string
89 /// but should not really be used during compilation, because it has an
90 /// internal cache that is context specific.
91 const DataLayout DL;
92
93 /// Triple string, CPU name, and target feature strings the TargetMachine
94 /// instance is created with.
95 Triple TargetTriple;
96 std::string TargetCPU;
97 std::string TargetFS;
98
99 Reloc::Model RM = Reloc::Static;
100 CodeModel::Model CMModel = CodeModel::Small;
101 uint64_t LargeDataThreshold = 0;
102 CodeGenOptLevel OptLevel = CodeGenOptLevel::Default;
103
104 /// Contains target specific asm information.
105 std::unique_ptr<const MCAsmInfo> AsmInfo;
106 std::unique_ptr<const MCRegisterInfo> MRI;
107 std::unique_ptr<const MCInstrInfo> MII;
108 std::unique_ptr<const MCSubtargetInfo> STI;
109
110 unsigned RequireStructuredCFG : 1;
111 unsigned O0WantsFastISel : 1;
112
113 // PGO related tunables.
114 std::optional<PGOOptions> PGOOption;
115
116public:
117 mutable TargetOptions Options;
118
119 TargetMachine(const TargetMachine &) = delete;
120 void operator=(const TargetMachine &) = delete;
121 virtual ~TargetMachine();
122
123 const Target &getTarget() const { return TheTarget; }
124
125 const Triple &getTargetTriple() const { return TargetTriple; }
126 StringRef getTargetCPU() const { return TargetCPU; }
127 StringRef getTargetFeatureString() const { return TargetFS; }
128 void setTargetFeatureString(StringRef FS) { TargetFS = std::string(FS); }
129
130 /// Virtual method implemented by subclasses that returns a reference to that
131 /// target's TargetSubtargetInfo-derived member variable.
132 virtual const TargetSubtargetInfo *getSubtargetImpl(const Function &) const {
133 return nullptr;
134 }
135 virtual TargetLoweringObjectFile *getObjFileLowering() const {
136 return nullptr;
137 }
138
139 /// Create the target's instance of MachineFunctionInfo
140 virtual MachineFunctionInfo *
141 createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F,
142 const TargetSubtargetInfo *STI) const {
143 return nullptr;
144 }
145
146 /// Allocate and return a default initialized instance of the YAML
147 /// representation for the MachineFunctionInfo.
148 virtual yaml::MachineFunctionInfo *createDefaultFuncInfoYAML() const {
149 return nullptr;
150 }
151
152 /// Allocate and initialize an instance of the YAML representation of the
153 /// MachineFunctionInfo.
154 virtual yaml::MachineFunctionInfo *
155 convertFuncInfoToYAML(const MachineFunction &MF) const {
156 return nullptr;
157 }
158
159 /// Parse out the target's MachineFunctionInfo from the YAML reprsentation.
160 virtual bool parseMachineFunctionInfo(const yaml::MachineFunctionInfo &,
161 PerFunctionMIParsingState &PFS,
162 SMDiagnostic &Error,
163 SMRange &SourceRange) const {
164 return false;
165 }
166
167 /// This method returns a pointer to the specified type of
168 /// TargetSubtargetInfo. In debug builds, it verifies that the object being
169 /// returned is of the correct type.
170 template <typename STC> const STC &getSubtarget(const Function &F) const {
171 return *static_cast<const STC*>(getSubtargetImpl(F));
172 }
173
174 /// Create a DataLayout.
175 const DataLayout createDataLayout() const { return DL; }
176
177 /// Test if a DataLayout if compatible with the CodeGen for this target.
178 ///
179 /// The LLVM Module owns a DataLayout that is used for the target independent
180 /// optimizations and code generation. This hook provides a target specific
181 /// check on the validity of this DataLayout.
182 bool isCompatibleDataLayout(const DataLayout &Candidate) const {
183 return DL == Candidate;
184 }
185
186 /// Get the pointer size for this target.
187 ///
188 /// This is the only time the DataLayout in the TargetMachine is used.
189 unsigned getPointerSize(unsigned AS) const {
190 return DL.getPointerSize(AS);
191 }
192
193 unsigned getPointerSizeInBits(unsigned AS) const {
194 return DL.getPointerSizeInBits(AS);
195 }
196
197 unsigned getProgramPointerSize() const {
198 return DL.getPointerSize(AS: DL.getProgramAddressSpace());
199 }
200
201 unsigned getAllocaPointerSize() const {
202 return DL.getPointerSize(AS: DL.getAllocaAddrSpace());
203 }
204
205 /// Reset the target options based on the function's attributes.
206 // FIXME: Remove TargetOptions that affect per-function code generation
207 // from TargetMachine.
208 void resetTargetOptions(const Function &F) const;
209
210 /// Return target specific asm information.
211 const MCAsmInfo *getMCAsmInfo() const { return AsmInfo.get(); }
212
213 const MCRegisterInfo *getMCRegisterInfo() const { return MRI.get(); }
214 const MCInstrInfo *getMCInstrInfo() const { return MII.get(); }
215 const MCSubtargetInfo *getMCSubtargetInfo() const { return STI.get(); }
216
217 /// If intrinsic information is available, return it. If not, return null.
218 virtual const TargetIntrinsicInfo *getIntrinsicInfo() const {
219 return nullptr;
220 }
221
222 bool requiresStructuredCFG() const { return RequireStructuredCFG; }
223 void setRequiresStructuredCFG(bool Value) { RequireStructuredCFG = Value; }
224
225 /// Returns the code generation relocation model. The choices are static, PIC,
226 /// and dynamic-no-pic, and target default.
227 Reloc::Model getRelocationModel() const;
228
229 /// Returns the code model. The choices are small, kernel, medium, large, and
230 /// target default.
231 CodeModel::Model getCodeModel() const { return CMModel; }
232
233 /// Returns the maximum code size possible under the code model.
234 uint64_t getMaxCodeSize() const;
235
236 /// Set the code model.
237 void setCodeModel(CodeModel::Model CM) { CMModel = CM; }
238
239 void setLargeDataThreshold(uint64_t LDT) { LargeDataThreshold = LDT; }
240 bool isLargeGlobalValue(const GlobalValue *GV) const;
241
242 bool isPositionIndependent() const;
243
244 bool shouldAssumeDSOLocal(const GlobalValue *GV) const;
245
246 /// Returns true if this target uses emulated TLS.
247 bool useEmulatedTLS() const;
248
249 /// Returns true if this target uses TLS Descriptors.
250 bool useTLSDESC() const;
251
252 /// Returns the TLS model which should be used for the given global variable.
253 TLSModel::Model getTLSModel(const GlobalValue *GV) const;
254
255 /// Returns the optimization level: None, Less, Default, or Aggressive.
256 CodeGenOptLevel getOptLevel() const;
257
258 /// Overrides the optimization level.
259 void setOptLevel(CodeGenOptLevel Level);
260
261 void setFastISel(bool Enable) { Options.EnableFastISel = Enable; }
262 bool getO0WantsFastISel() { return O0WantsFastISel; }
263 void setO0WantsFastISel(bool Enable) { O0WantsFastISel = Enable; }
264 void setGlobalISel(bool Enable) { Options.EnableGlobalISel = Enable; }
265 void setGlobalISelAbort(GlobalISelAbortMode Mode) {
266 Options.GlobalISelAbort = Mode;
267 }
268 void setMachineOutliner(bool Enable) {
269 Options.EnableMachineOutliner = Enable;
270 }
271 void setSupportsDefaultOutlining(bool Enable) {
272 Options.SupportsDefaultOutlining = Enable;
273 }
274 void setSupportsDebugEntryValues(bool Enable) {
275 Options.SupportsDebugEntryValues = Enable;
276 }
277
278 void setCFIFixup(bool Enable) { Options.EnableCFIFixup = Enable; }
279
280 bool getAIXExtendedAltivecABI() const {
281 return Options.EnableAIXExtendedAltivecABI;
282 }
283
284 bool getUniqueSectionNames() const { return Options.UniqueSectionNames; }
285
286 /// Return true if unique basic block section names must be generated.
287 bool getUniqueBasicBlockSectionNames() const {
288 return Options.UniqueBasicBlockSectionNames;
289 }
290
291 /// Return true if data objects should be emitted into their own section,
292 /// corresponds to -fdata-sections.
293 bool getDataSections() const {
294 return Options.DataSections;
295 }
296
297 /// Return true if functions should be emitted into their own section,
298 /// corresponding to -ffunction-sections.
299 bool getFunctionSections() const {
300 return Options.FunctionSections;
301 }
302
303 /// Return true if visibility attribute should not be emitted in XCOFF,
304 /// corresponding to -mignore-xcoff-visibility.
305 bool getIgnoreXCOFFVisibility() const {
306 return Options.IgnoreXCOFFVisibility;
307 }
308
309 /// Return true if XCOFF traceback table should be emitted,
310 /// corresponding to -xcoff-traceback-table.
311 bool getXCOFFTracebackTable() const { return Options.XCOFFTracebackTable; }
312
313 /// If basic blocks should be emitted into their own section,
314 /// corresponding to -fbasic-block-sections.
315 llvm::BasicBlockSection getBBSectionsType() const {
316 return Options.BBSections;
317 }
318
319 /// Get the list of functions and basic block ids that need unique sections.
320 const MemoryBuffer *getBBSectionsFuncListBuf() const {
321 return Options.BBSectionsFuncListBuf.get();
322 }
323
324 /// Returns true if a cast between SrcAS and DestAS is a noop.
325 virtual bool isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const {
326 return false;
327 }
328
329 void setPGOOption(std::optional<PGOOptions> PGOOpt) { PGOOption = PGOOpt; }
330 const std::optional<PGOOptions> &getPGOOption() const { return PGOOption; }
331
332 /// If the specified generic pointer could be assumed as a pointer to a
333 /// specific address space, return that address space.
334 ///
335 /// Under offloading programming, the offloading target may be passed with
336 /// values only prepared on the host side and could assume certain
337 /// properties.
338 virtual unsigned getAssumedAddrSpace(const Value *V) const { return -1; }
339
340 /// If the specified predicate checks whether a generic pointer falls within
341 /// a specified address space, return that generic pointer and the address
342 /// space being queried.
343 ///
344 /// Such predicates could be specified in @llvm.assume intrinsics for the
345 /// optimizer to assume that the given generic pointer always falls within
346 /// the address space based on that predicate.
347 virtual std::pair<const Value *, unsigned>
348 getPredicatedAddrSpace(const Value *V) const {
349 return std::make_pair(x: nullptr, y: -1);
350 }
351
352 /// Get a \c TargetIRAnalysis appropriate for the target.
353 ///
354 /// This is used to construct the new pass manager's target IR analysis pass,
355 /// set up appropriately for this target machine. Even the old pass manager
356 /// uses this to answer queries about the IR.
357 TargetIRAnalysis getTargetIRAnalysis() const;
358
359 /// Return a TargetTransformInfo for a given function.
360 ///
361 /// The returned TargetTransformInfo is specialized to the subtarget
362 /// corresponding to \p F.
363 virtual TargetTransformInfo getTargetTransformInfo(const Function &F) const;
364
365 /// Allow the target to modify the pass pipeline.
366 // TODO: Populate all pass names by using <Target>PassRegistry.def.
367 virtual void registerPassBuilderCallbacks(PassBuilder &,
368 bool PopulateClassToPassNames) {}
369
370 /// Allow the target to register alias analyses with the AAManager for use
371 /// with the new pass manager. Only affects the "default" AAManager.
372 virtual void registerDefaultAliasAnalyses(AAManager &) {}
373
374 /// Add passes to the specified pass manager to get the specified file
375 /// emitted. Typically this will involve several steps of code generation.
376 /// This method should return true if emission of this file type is not
377 /// supported, or false on success.
378 /// \p MMIWP is an optional parameter that, if set to non-nullptr,
379 /// will be used to set the MachineModuloInfo for this PM.
380 virtual bool
381 addPassesToEmitFile(PassManagerBase &, raw_pwrite_stream &,
382 raw_pwrite_stream *, CodeGenFileType,
383 bool /*DisableVerify*/ = true,
384 MachineModuleInfoWrapperPass *MMIWP = nullptr) {
385 return true;
386 }
387
388 /// Add passes to the specified pass manager to get machine code emitted with
389 /// the MCJIT. This method returns true if machine code is not supported. It
390 /// fills the MCContext Ctx pointer which can be used to build custom
391 /// MCStreamer.
392 ///
393 virtual bool addPassesToEmitMC(PassManagerBase &, MCContext *&,
394 raw_pwrite_stream &,
395 bool /*DisableVerify*/ = true) {
396 return true;
397 }
398
399 /// True if subtarget inserts the final scheduling pass on its own.
400 ///
401 /// Branch relaxation, which must happen after block placement, can
402 /// on some targets (e.g. SystemZ) expose additional post-RA
403 /// scheduling opportunities.
404 virtual bool targetSchedulesPostRAScheduling() const { return false; };
405
406 void getNameWithPrefix(SmallVectorImpl<char> &Name, const GlobalValue *GV,
407 Mangler &Mang, bool MayAlwaysUsePrivate = false) const;
408 MCSymbol *getSymbol(const GlobalValue *GV) const;
409
410 /// The integer bit size to use for SjLj based exception handling.
411 static constexpr unsigned DefaultSjLjDataSize = 32;
412 virtual unsigned getSjLjDataSize() const { return DefaultSjLjDataSize; }
413
414 static std::pair<int, int> parseBinutilsVersion(StringRef Version);
415
416 /// getAddressSpaceForPseudoSourceKind - Given the kind of memory
417 /// (e.g. stack) the target returns the corresponding address space.
418 virtual unsigned getAddressSpaceForPseudoSourceKind(unsigned Kind) const {
419 return 0;
420 }
421
422 /// Entry point for module splitting. Targets can implement custom module
423 /// splitting logic, mainly used by LTO for --lto-partitions.
424 ///
425 /// \returns `true` if the module was split, `false` otherwise. When `false`
426 /// is returned, it is assumed that \p ModuleCallback has never been called
427 /// and \p M has not been modified.
428 virtual bool splitModule(
429 Module &M, unsigned NumParts,
430 function_ref<void(std::unique_ptr<Module> MPart)> ModuleCallback) const {
431 return false;
432 }
433};
434
435/// This class describes a target machine that is implemented with the LLVM
436/// target-independent code generator.
437///
438class LLVMTargetMachine : public TargetMachine {
439protected: // Can only create subclasses.
440 LLVMTargetMachine(const Target &T, StringRef DataLayoutString,
441 const Triple &TT, StringRef CPU, StringRef FS,
442 const TargetOptions &Options, Reloc::Model RM,
443 CodeModel::Model CM, CodeGenOptLevel OL);
444
445 void initAsmInfo();
446
447public:
448 /// Get a TargetTransformInfo implementation for the target.
449 ///
450 /// The TTI returned uses the common code generator to answer queries about
451 /// the IR.
452 TargetTransformInfo getTargetTransformInfo(const Function &F) const override;
453
454 /// Create a pass configuration object to be used by addPassToEmitX methods
455 /// for generating a pipeline of CodeGen passes.
456 virtual TargetPassConfig *createPassConfig(PassManagerBase &PM);
457
458 /// Add passes to the specified pass manager to get the specified file
459 /// emitted. Typically this will involve several steps of code generation.
460 /// \p MMIWP is an optional parameter that, if set to non-nullptr,
461 /// will be used to set the MachineModuloInfo for this PM.
462 bool
463 addPassesToEmitFile(PassManagerBase &PM, raw_pwrite_stream &Out,
464 raw_pwrite_stream *DwoOut, CodeGenFileType FileType,
465 bool DisableVerify = true,
466 MachineModuleInfoWrapperPass *MMIWP = nullptr) override;
467
468 virtual Error buildCodeGenPipeline(ModulePassManager &, raw_pwrite_stream &,
469 raw_pwrite_stream *, CodeGenFileType,
470 const CGPassBuilderOption &,
471 PassInstrumentationCallbacks *) {
472 return make_error<StringError>(Args: "buildCodeGenPipeline is not overridden",
473 Args: inconvertibleErrorCode());
474 }
475
476 /// Add passes to the specified pass manager to get machine code emitted with
477 /// the MCJIT. This method returns true if machine code is not supported. It
478 /// fills the MCContext Ctx pointer which can be used to build custom
479 /// MCStreamer.
480 bool addPassesToEmitMC(PassManagerBase &PM, MCContext *&Ctx,
481 raw_pwrite_stream &Out,
482 bool DisableVerify = true) override;
483
484 /// Returns true if the target is expected to pass all machine verifier
485 /// checks. This is a stopgap measure to fix targets one by one. We will
486 /// remove this at some point and always enable the verifier when
487 /// EXPENSIVE_CHECKS is enabled.
488 virtual bool isMachineVerifierClean() const { return true; }
489
490 /// Adds an AsmPrinter pass to the pipeline that prints assembly or
491 /// machine code from the MI representation.
492 bool addAsmPrinter(PassManagerBase &PM, raw_pwrite_stream &Out,
493 raw_pwrite_stream *DwoOut, CodeGenFileType FileType,
494 MCContext &Context);
495
496 Expected<std::unique_ptr<MCStreamer>>
497 createMCStreamer(raw_pwrite_stream &Out, raw_pwrite_stream *DwoOut,
498 CodeGenFileType FileType, MCContext &Ctx);
499
500 /// True if the target uses physical regs (as nearly all targets do). False
501 /// for stack machines such as WebAssembly and other virtual-register
502 /// machines. If true, all vregs must be allocated before PEI. If false, then
503 /// callee-save register spilling and scavenging are not needed or used. If
504 /// false, implicitly defined registers will still be assumed to be physical
505 /// registers, except that variadic defs will be allocated vregs.
506 virtual bool usesPhysRegsForValues() const { return true; }
507
508 /// True if the target wants to use interprocedural register allocation by
509 /// default. The -enable-ipra flag can be used to override this.
510 virtual bool useIPRA() const {
511 return false;
512 }
513
514 /// The default variant to use in unqualified `asm` instructions.
515 /// If this returns 0, `asm "$(foo$|bar$)"` will evaluate to `asm "foo"`.
516 virtual int unqualifiedInlineAsmVariant() const { return 0; }
517
518 // MachineRegisterInfo callback function
519 virtual void registerMachineRegisterInfoCallback(MachineFunction &MF) const {}
520};
521
522/// Helper method for getting the code model, returning Default if
523/// CM does not have a value. The tiny and kernel models will produce
524/// an error, so targets that support them or require more complex codemodel
525/// selection logic should implement and call their own getEffectiveCodeModel.
526inline CodeModel::Model
527getEffectiveCodeModel(std::optional<CodeModel::Model> CM,
528 CodeModel::Model Default) {
529 if (CM) {
530 // By default, targets do not support the tiny and kernel models.
531 if (*CM == CodeModel::Tiny)
532 report_fatal_error(reason: "Target does not support the tiny CodeModel", gen_crash_diag: false);
533 if (*CM == CodeModel::Kernel)
534 report_fatal_error(reason: "Target does not support the kernel CodeModel", gen_crash_diag: false);
535 return *CM;
536 }
537 return Default;
538}
539
540} // end namespace llvm
541
542#endif // LLVM_TARGET_TARGETMACHINE_H
543

source code of llvm/include/llvm/Target/TargetMachine.h